Electrostatic discharge (ESD) events are a common part of everyday life and some of the larger discharges are detectable by humans. ESD is a transient surge in voltage (negative or positive) that may induce a large current in a circuit. Smaller discharges often go unnoticed because the ratio of discharge strength to surface area over which the discharge occurs may be very small.
Integrated circuits (ICs) have been shrinking at an incredible rate over past decades. As transistors shrink in size, the supporting components around transistors generally shrink as well. The shrinking of IC dimensions decreases the ESD tolerance of transistors thereby increasing the sensitivity of integrated circuits to ESD stress.
An ESD event occurs when an object at a first potential comes near or into contact with an object at a second potential. Rapid transfer of charge from the first object to the second object occurs such that the two objects are at approximately equal potential. Where the object with lower charge is an integrated circuit, the discharge attempts to find the path of least resistance through the integrated circuit to a ground. Often, this path flows through interconnects. Parts of this path that are unable to withstand the energy associated with the discharge may sustain damage, potentially rendering the integrated circuit unfit for use.
ESD is a major concern for integrated circuits. To protect circuits against damage from ESD surges, protection schemes attempt to provide a discharge path for both positive and negative ESD surges. Conventional diodes may be employed in ESD protection circuits to clamp the voltage of positive and negative ESD surges to shunt current and prevent excessive voltage from being applied to a protected circuit. FIG. 1 illustrates a conventional ESD protection circuit in this regard. As illustrated in FIG. 1, a voltage rail (Vdd) 10 and a ground rail (GND) 12 are provided to power a protected circuit 14. In this example, a terminal in the form of a signal pin 16 provides a signal path to the protected circuit 14 for providing information and/or control to the protected circuit 14. For example, the protected circuit 14 may be included in an IC, with the signal pin 16 being an externally available pin on the IC.
A conventional ESD protection circuit 18 may be coupled between the voltage rail 10 and ground rail 12 to protect the protected circuit 14 from ESD surges. The exemplary ESD protection circuit 18 in FIG. 1 includes two conventional diodes: a positive ESD surge diode 20 and a negative ESD surge diode 22. The positive ESD surge diode 20 and the negative ESD surge diode 22 are coupled in series. The positive ESD surge diode 20 clamps positive voltage on the signal pin 16 to one diode drop above the voltage rail 10. The negative ESD surge diode 22 clamps negative voltage on the signal pin 16 to one diode drop below the ground rail 12. A cathode (k) of the positive ESD surge diode 20 is coupled to the voltage rail 10. An anode (a) of the positive ESD diode 20 is coupled to the signal pin 16 at a node 24 on the signal path between the signal pin 16 and the protected circuit 14. A cathode (k) of the negative ESD surge diode 22 is also coupled to the node 24 on the signal path from the signal pin 16 to the protected circuit 14. An anode (a) of the negative ESD surge diode 22 is coupled to the ground rail 12.
For positive ESD surges on the signal pin 16, the positive ESD surge diode 20 will become forward biased and clamp voltage on the signal pin 16 to one diode drop above the voltage rail 10 to protect the protected circuit 14. Energy from such an ESD surge will be conducted through the positive ESD surge diode 20 in a forward biased mode and dispersed into the voltage rail 10. Appropriate ESD protection structures may be implemented (not shown) in the voltage rail 10 to eventually dissipate a positive ESD surge to the ground rail 12. For negative ESD surges on the signal pin 16, the surge is similarly dissipated. A negative ESD surge on the signal pin 16 will place the negative ESD surge diode 22 in a forward biased mode thus providing a low-impedance path relative to the protected circuit 14. Energy from the negative ESD surge will be dissipated into the ground rail 12.
Although not depicted, other types of conventional ESD circuitry may involve a resistor-capacitor (RC) clamp to provide ESD protection.
Conventional ESD protection structures are designed to ensure high voltage protection and fast response times. However, a considerable amount of area (tens to thousands of square microns for each ESD protection structure) of an integrated circuit is consumed by ESD protection structures that might otherwise be available for active circuitry. To meet increasing demand in integrated circuits for smaller form factors, ESD protection circuit size should be reduced.